Software Engineer, Compiler, Scheduling and Optimization, Silicon

Minimum qualifications:

• Bachelor’s degree or equivalent practical experience.
• 2 years of experience with software development in one or more programming languages (e.g., C++), or 1 year of experience with an advanced degree.
• 2 years of experience with data structures or algorithms.
• 2 years of experience working with compilers (compiler optimizations, parallelization, etc.).

Preferred qualifications:

• Master’s degree or PhD in Computer Science or a related technical fields.
• Experience in Multi-Level Intermediate Representation (MLIR) or Low Level Virtual Machine (LLVM).
• Experience with compiler development in the context of accelerator-based architectures.
• Experience with machine-learning and generative AI architectures.
• Experience in developing accessible technologies.
• Experience with C++ or Python.

About the job

Google’s software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We’re looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.

In this role, you will work on the core optimization and scheduling algorithms of the next-generation compiler featuring an Multi-Level Intermediate Representation (MLIR)-based compiler framework serving both production and hardware/software codesign needs for EdgeTPU, the core algorithms are critical to deliver the best Artificial Intelligence/Machine Learning (AI/ML) performance of the silicon to our end users. You will design and implement optimization algorithms and compiler transformation frameworks to enable production-quality compilation and optimization of workloads. You will be able to make an impact on hardware/software co-optimization of AI/ML use cases for current and future generations of Google devices, including the latest Generative AI (GenAI) models.Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.

The US base salary range for this full-time position is $141,000-$202,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

In this role, you will work on the core optimization and scheduling algorithms of the next-generation compiler featuring an Multi-Level Intermediate Representation (MLIR)-based compiler framework serving both production and hardware/software codesign needs for EdgeTPU, the core algorithms are critical to deliver the best Artificial Intelligence/Machine Learning (AI/ML) performance of the silicon to our end users. You will design and implement optimization algorithms and compiler transformation frameworks to enable production-quality compilation and optimization of workloads. You will be able to make an impact on hardware/software co-optimization of AI/ML use cases for current and future generations of Google devices, including the latest Generative AI (GenAI) models.

Responsibilities

• Work as part of the EdgeTPU compiler team, including analyzing and improving the compiler quality and performance on optimization decisions, correctness, and compilation time.
• Develop parallelization and scheduling algorithms to optimize compute and data movement costs to execute Machine Learning workloads on the EdgeTPU.
• Work on efficient mapping of generative AI models and other workloads into EdgeTPU instructions through the compiler.
• Work with EdgeTPU architects to design the hardware/software interface and co-optimizations of the next generation EdgeTPU architectures.
• Work with product managers, researchers in identifying Machine Learning trends, future use cases, etc.